For example, Synplify Pro and Synplify Premier software and Xilinx’s ISE Design Suite deliver a jointly developed Design Preservation flow, allowing users to iterate on targeted portions of the design while maintaining the performance of pre-implemented, pre-verified design blocks. Synplify Premier software also includes extensive SystemVerilog language support and native support for DesignWare ® IP, which allows the same IP code used in the design to be available within the FPGA-based prototype.īecause of their close collaboration, Synopsys and Xilinx offer several optimized and integrated tool features. When used for FPGA-based prototyping projects, Synplify Premier software automatically converts the gated clocks, generated clocks and tri-states present in many ASIC designs into the target FPGA, making RTL code changes unnecessary. The Synplify Premier software’s Fast-Mode enables up to 4X faster runtimes than normal logic synthesis, and when combined with multiprocessing, can achieve up to 10X faster runtimes. The Synplify Pro and Synplify Premier design tools offer faster runtimes which are especially important for high-density designs. Together, the Synplify Pro/Synplify Premier design software and the Synphony High-Level Synthesis tools provide a comprehensive synthesis solution that helps eliminate months of time spent hand-coding RTL while reducing risk in large, multi-million gate designs. Synphony high-level synthesis creates optimized FPGA implementations for use with Synplify Pro and Synplify Premier software and includes integration features such as technology characterization, constraint generation for multi-rate, multi-clock implementations, and support for advanced device hardware such as multipliers, DSP units and memories. “The Synopsys synthesis software along with our new IDS 13 enables our customers to successfully take advantage of the capabilities this complexity brings with it, and our collaboration with Synopsys lets our customers produce the best results.”

“FPGA device technology is advancing rapidly toward ASIC-like complexity,” said Tom Feist, senior director, IDS marketing at Xilinx. Synopsys’ advanced FPGA synthesis tools include a hierarchical project manager that enables team-design collaboration with a mixed bottom-up/top-down approach that is highly integrated with Xilinx’s SmartGuide incremental place & route (P&R) technology, delivering faster RTL-to-board implementation. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced Synplify Pro, Synplify Premier and Synphony synthesis support for Xilinx’s latest ISE ® Design Suite (IDS) 13, which provides support for their 28-nanometer (nm) 7 series FPGAs.

MOUNTAIN VIEW, Calif., March 8, 2011– Synopsys, Inc.

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